Semiconductor chips used in a multitude of electronic devices are structured or composite substrates fabricated from materials including semiconductors, dielectrics, metals, metal oxides, and patterned films comprising these materials. For example, the critical circuitry and interconnects on semiconductor chips require deposition of metals including, but not limited to, copper, aluminum, tungsten, tantalum, and ruthenium in pattern features, e.g., vias and trenches of the chip. The impetus to produce devices with higher component densities, enhanced operating speeds and/or efficiencies means smaller features and/or generally more complex geometries are required. As the footprint of critical feature patterns continues to decrease, efficient, optimum, and/or proper deposition of materials is not guaranteed using standard or established industry deposition technologies. Accordingly, a need exists for processes that selectively deposit materials, e.g., as layers, films (e.g., deposition of barrier films on silicon wafer surfaces for semiconductor chip manufacturing), and fillers or coatings to surfaces, sub-surfaces, feature patterns (e.g., vias), and/or other surfaces having complex geometries, e.g., voids (e.g., three-dimensional voids), and tunnels (e.g., interconnected tunnels).